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Signals/Connections
2.11 Timers
Three identical and independent timers are implemented in the DSP56311. Each timer can use
internal or external clocking and can either interrupt the DSP56311 after a specified number of
events (clocks) or signal an external device after counting a specific number of internal events.
Table 2-14. Triple Timer Signals
Signal
Name
TIO0
Type
Input or Output
State During
Reset 1, 2
Ignored input
Signal Description
Timer 0 Schmitt-Trigger Input/Output
As an external event counter or in Measurement mode, TIO0 is input. In
Watchdog, Timer, or Pulse Modulation mode, TIO0 is output. The default
mode after reset is GPIO input. This can be changed to output or
configured as a Timer Input/Output through the Timer 0 Control/Status
Register (TCSR0). This input is 5 V tolerant.
TIO1
Input or Output
Ignored input
Timer 1 Schmitt-Trigger Input/Output
As an external event counter or in Measurement mode, TIO1 is input. In
Watchdog, Timer, or Pulse Modulation mode, TIO1 is output. The default
mode after reset is GPIO input. This can be changed to output or
configured as a Timer Input/Output through the Timer 1 Control/Status
Register (TCSR1). This input is 5 V tolerant.
TIO2
Input or Output
Ignored input
Timer 2 Schmitt-Trigger Input/Output
As an external event counter or in Measurement mode, TIO2 is input. In
Watchdog, Timer, or Pulse Modulation mode, TIO2 is output. The default
mode after reset is GPIO input. This can be changed to output or
configured as a Timer Input/Output through the Timer 2 Control/Status
Register (TCSR2). This input is 5 V tolerant.
Notes: 1.
2.
2-18
In the Stop state, the signal maintains the last state as follows:
? If the last state is input, the signal is an ignored input.
? If the last state is output, these lines are tri-stated.
The Wait processing state does not affect the signal state.
DSP56311 User’s Manual, Rev. 2
Freescale Semiconductor
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